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FPGAを使った論理回路用実験装置
https://uec.repo.nii.ac.jp/records/8364
https://uec.repo.nii.ac.jp/records/8364e2dcc57a-84ef-4668-a6d1-64fa130e970d
Item type | 紀要論文 / Departmental Bulletin Paper(1) | |||||
---|---|---|---|---|---|---|
公開日 | 2003-01-01 | |||||
タイトル | ||||||
タイトル | FPGAを使った論理回路用実験装置 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | FPGA Logic Trainer for Logic Design Laboratory | |||||
言語 | ||||||
言語 | jpn | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | departmental bulletin paper | |||||
アクセス権 | ||||||
アクセス権 | metadata only access | |||||
アクセス権URI | http://purl.org/coar/access_right/c_14cb | |||||
著者 |
奈良岡, 雅人
× 奈良岡, 雅人× 鈴木, 貢× 楯岡, 孝道× 阿部, 公輝× Naraoka, Masato× Suzuki, Mitsugu× Tateoka, Takamichi× Abe, Koki |
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書誌情報 |
電気通信大学紀要 en : Bulletin of the University of Electro-Communications 巻 15, 号 2, p. 215-218, 発行日 2003-01 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 09150935 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AN10016842 |