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スーパースカラ・プロセッサの設計と評価および VLSIへの実装
https://uec.repo.nii.ac.jp/records/8339
https://uec.repo.nii.ac.jp/records/833949717451-86e8-43ad-9ed3-b6ae2907692c
Item type | 紀要論文 / Departmental Bulletin Paper(1) | |||||
---|---|---|---|---|---|---|
公開日 | 2001-07-01 | |||||
タイトル | ||||||
タイトル | スーパースカラ・プロセッサの設計と評価および VLSIへの実装 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | Design and Evaluations of a Superscalar Processor and Its VLSI Implementation | |||||
言語 | ||||||
言語 | jpn | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | departmental bulletin paper | |||||
アクセス権 | ||||||
アクセス権 | metadata only access | |||||
アクセス権URI | http://purl.org/coar/access_right/c_14cb | |||||
著者 |
川口, 英一郎
× 川口, 英一郎× 阿部, 公輝× Kawaguchi, Eiichiro× Abe, Koki |
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書誌情報 |
電気通信大学紀要 en : Bulletin of the University of Electro-Communications 巻 14, 号 1, p. 47-54, 発行日 2001-07 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 09150935 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AN10016842 |